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* Elena Weinberg & Andy Whetzel
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* VLSI Fall 2013
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* 12/09/2013
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Contained in this directory are the files created and used for the semester long project for ECE 6332 - VLSI in the fall of 2013.  The synthesized schematics are contained within the "schematics" subfolder, while the simulations conducted are within the "simulations" subfolder.

The following is a description of what schematic files were used to conduct the simulations used for the final deliverables:

The 8bitAdderCompare_TB simulation file was used to simulate the ripple carry adder which was not supply biased.  The results are presented in the Discussion (4) section of the final paper.  The schematics used are as follows:
 - CmosNand
 - CmosNor
 - CmosXor
 - Inverter
 - FullAdder
 - 4FOInverter
 - 8bitAdderCompare_TB

The netlist for this simulation can be found under 8bitAdderCompare_TB/spectre/schematic/netlist/input.scs


The 8BitAdder_TB simulation file was used to simulate the supply biased ripple carry adder.  The results are presented in Figures 5, 6(a), and 6(b) in the final paper.  The schematics used are as follow:
 - NAND
 - NOR
 - SupplyBiasXor
 - AdderBuffer
 - DelVGate
 - AdderBuffer
 - 8BitAdder_TB

The netlist for this simulation can be found under 8BitAdder_TB/spectre/schematic/netlist/input.scs


The ModifiedVGate_TB simulation file was used to simulate the supply biased inverter in a 11-gate ring oscillator.  The results are presented in Figures 2, 3(a), and 3(b) in the final paper.  The schematics used are as follows:
 - DelVGate
 - ModifiedVGate_TB

The netlist for this simulation can be found under ModifiedVGate_TB/spectre/schematic/netlist/input.scs


The NAND_TB simulation file was used to simulate the supply biased NAND gate in an 11-gate ring oscillator. The results are presented in the Ring Oscillator (3.2) section of the final paper.  The schematics used are as follows:
 - NAND
 - NAND_TB

The netlist for this simulation can be found under NAND_TB/spectre/schematic/netlist/input.scs


The NOR_TB simulation file was used to simulate the supply biased NOR gate in an 11-gate ring oscillator.  The results are presented in the Ring Oscillator (3.2) section of the final paper.  The following schematics were used:
 - NOR
 - NOR_TB

The netlist for this simulation can be found under NOR_TB/spectre/schematic/netlist/input.scs
